Move information efficiently between the parts of a computer. You will work on the memory and packaging choices that determine practical model capacity and performance.
Not open yet: Custom silicon gate
This work starts when that stage arrives, so there is no application to submit today and we will not pretend otherwise. What is written below is what the role is for and what would make somebody right for it, published early on purpose so you can decide whether it is worth watching.
The work
Evaluate packaging, memory technologies, high-speed links, thermal coupling and assembly constraints. Coordinate with architecture, signal-integrity, supplier and manufacturing teams. Translate bandwidth and reliability requirements into realistic physical and commercial options.
The milestone
In your first 90 days after program activation, deliver a package and memory trade study with cost, availability, validation and service implications.
Evidence
Bring experience with advanced packaging, memory subsystems or high-speed interconnect engineering. Understand that advertised bandwidth, sustained bandwidth and usable model memory are different quantities.
Evidence, not credentials. We are describing work you can point at, in whatever form it exists.
The exercise
Compare two memory topologies for the same workload while accounting for capacity, power, thermal limits and testability.